876784 Intel, 876784 Datasheet - Page 704

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

18.1.64
18.1.65
18.1.66
704
ULD — Upstream Link Description Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 190h
Default Value:
ULBA — Upstream Link Base Address Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 198h
Default Value:
PEETM — PCI Express Extended Test Mode Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 318h
Default Value:
31:24
23:16
63:32
15:2
31:0
7:3
1:0
Bit
Bit
Bit
1
0
2
Target Port Number (PN) — RO. This field indicates the port number of the RCRB.
Target Component ID (TCID) — RO. This field returns the value of the ESD.CID field
(Chipset Configuration Space: Offset 0104h:bits 23:16) of the chip configuration
section, that is programmed by platform BIOS, since the root port is in the same
component as the RCRB.
Reserved.
Link Type (LT) — RO. This bit indicates that the link points to the Intel
Link Valid (LV) — RO. This bit indicates that this link entry is valid.
Base Address Upper (BAU) — RO. The RCRB of the Intel
Base Address Lower (BAL) — RO. This field matches the RCBA register
(D31:F0:Offset F0h) value in the LPC bridge.
Reserved
Scrambler Bypass Mode (BAU) — R/W.
0 = Normal operation. Scrambler and descrambler are used.
1 = Bypasses the data scrambler in the transmit direction and the data de-scrambler in
NOTE: This functionality intended for debug/testing only.
NOTE: If bypassing scrambler with Intel
Reserved
the receive direction.
ICH7 root port must have this bit set.
00000001h
See Description
See Description
–
–
193h
19Fh
PCI Express* Configuration Registers (Desktop and Mobile Only)
Description
Description
Description
§
®
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
ICH7 root port 1 in x4 configuration, each
Intel
®
RO
32 bits
RO
64 bits
RO
8 bits
ICH7 is in 32-bit space.
®
ICH7 Family Datasheet
®
ICH7 RCRB.