876784 Intel, 876784 Datasheet - Page 242

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

5.23.1.3
5.23.1.4
5.23.1.4.1
242
Cold Boot/Resume from S3 When Docked
Undock Sequence
There are two possible undocking scenarios. The first is the one that is initiated by the
user that invokes software and gracefully shuts down the dock codecs before they are
undocked. The second is referred to as the “surprise undock” where the user undocks
while the dock codec is running. Both of these situations appear the same to the
controller as it is not cognizant of the “surprise removal”. But both sequences will be
discussed here.
Normal Undock
1. When booting and resuming from S3, PLTRST# switches from asserted to de-
2. POST BIOS detects that the dock is attached and sets the DCKCTL.DA bit to 1. Note
3. The Bus Driver clears the STATESTS bits, then de-asserts CRST#, waits
4. When CRST# is de-asserted, the dock state machine detects that DCKCTL.DA is
5. The Bus Driver enumerates the codecs present as indicated via the STATESTS bits.
1. In the docked quiescent state, the Dock Attach (DCKCTL.DA) bit and the Dock Mate
2. The user initiates an undock event through the GUI interface or by pushing a
3. ACPI BIOS will call the HD Audio Bus Driver software in order to halt the stream to
4. The ACPI BIOS initiates the hardware undocking sequence by writing a 0 to the
5. The HD Audio controller asserts AZ_DOCK_RST#. AZ_DOCK_RST# assertion shall
6. A minimum of 4 BCLKs after AZ_DOCK_RST# the controller will de-assert
7. After this hardware undocking sequence is complete (a maximum of TBD from
asserted. This clears the DCKCTL.DA bit and the dock state machines. Because the
dock state machines are reset, the dock is electrically isolated (AZ_DOCK_EN# de-
asserted) and DOCK_RST# is asserted.
that at this point CRST# is still asserted so the dock state machine will remain in its
reset state.
approximately 7 ms, then checks the STATESTS bits to see which codecs are
present.
still set and the controller hardware sequences through steps to electrically connect
the dock by asserting AZ_DOCK_EN# and then eventually de-asserts DOCK_RST#.
This completes within the 7 ms mentioned in step 3).
(DCKSTS.DM) bit are both asserted. The AZ_DOCK_EN# signal is asserted and
AZ_DOCK_RST# is de-asserted.
button. This mechanism is outside the scope of this section of the document. Either
way ACPI BIOS software will be invoked to manage the undock process.
the dock codec(s) prior to electrical undocking. If the HD Audio Bus Driver is not
capable of halting the stream to the docked codec, ACPI BIOS will initiate the
hardware undocking sequence as described in the next step while the dock stream
is still running. From this standpoint, the result is similar to the “surprise undock”
scenario where an audio glitch may occur to the docked codec(s) during the undock
process.
DCKCTL.DA bit.
be synchronous to BCLK. There are no other timing requirements for
AZ_DOCK_RST# assertion. Note that the HD Audio link reset specification
requirement that the last Frame sync be skipped will not be met.
AZ_DOCK_EN# to isolate the dock codec signals from the ICH7 HD Audio link
signals. AZ_DOCK_EN# is de-asserted synchronously to BCLK and timed such that
BCLK, SYNC, and SDO are low.
DCKCTL.DA being written from “1” to “0”), the controller hardware clears the
DCKSTS.DM bit to 0 indicating that the dock is now un-mated. ACPI BIOS software
polls DCKSTS.DM and when it sees DM set, conveys to the end user that physical
undocking can proceed. The controller is now ready for a subsequent docking
event.
Intel
®
ICH7 Family Datasheet
Functional Description