876784 Intel, 876784 Datasheet - Page 332

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

8.3.4
332
ASF_CNTL_EN—ASF Control Enable Register
(ASF Controller—B1:D8:F0)
Offset Address: E3h
Default Value:
This register is used to enable global processing as well as polling. GLOBAL ENABLE
controls all of the SMBus processing and packet creation.
2:0
Bit
7
6
5
4
3
Global Enable (CENA_ALL) — R/W.
0 = Disable
1 = All control and polling enabled
Receive Enable (CENA_RX) — R/W.
0 = Disable
1 = TCO Receives enabled.
Transmit Enable (CENA_TX) — R/W.
0 = Disable
1 = SOS and RMCP Transmits enabled
ASF Polling Enable (CENA_APOL) — R/W.
0 = Disable
1 = Enable ASF Sensor Polling.
Legacy Polling Enable (CENA_LPOL) — R/W.
0 = Disable
1 = Enable Legacy Sensor Polling.
Number of Legacy Poll Devices (CENA_NLPOL) — R/W. This 3-bit value indicates
how many of the eight possible polling descriptors are active.
000 = First polling descriptor is active.
001 = First two polling descriptors are active.
...
111 = Enables all eight descriptors.
00h
LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
Description
Attribute:
Size:
Intel
R/W
8 bits
®
ICH7 Family Datasheet