EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 51

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Figure 3–5. M9K RAM Block LAB Row Interface
Altera Corporation-Preliminary
March 2007
Direct link
interconnect
to adjacent LAB
Direct link
interconnect
from adjacent LAB
C4 Interconnects
f
M9K RAM Block Local
Interconnect Region
16
18
M9K Routing Interface
The R4, C4, and direct link interconnects from adjacent LABs or blocks
drive the M9K block local interconnect. The M9K blocks can
communicate with LABs or blocks on either the left or right side through
these row resources, or with LAB columns on either left or right with the
column resources. Up to 16 direct link input connections to the M9K block
are possible from the left adjacent LAB and another 16 possible from the
right adjacent LAB. The M9K block outputs can also connect to left and
right LABs through each 18 direct link interconnects.
the M9K block to logic array interface.
See the Embedded Memory Blocks in Cyclone III Devices Chapter in volume 1
of the Cyclone III Device Handbook for more information about Cyclone III
embedded memory blocks.
Byte enable
Clocks
address
LAB Row Clocks
M9K RAM
Block
datain
dataout
Signals
Control
Cyclone III Device Handbook, Volume 1
6
16
MultiTrack Interconnect
Figure 3–5
Direct link
interconnect
to adjacent LAB
Direct link
interconnect
from adjacent LAB
R4 Interconnects
shows
3–9

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