EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 454

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

I/O Timing
1–44
Cyclone III Handbook
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
1.8-V LVTTL/LVCMOS
1.2-V LVTTL/LVCMOS
3.3-V LVTTL
3.3V LVCMOS
3.0-V LVTTL
Table 1–44. Maximum Output Clock Toggle Rate on Cyclone III Devices (Part 5 of 5)
Table 1–45. Maximum Output Clock Toggle Rate Derating Factors on Cyclone III
Devices (Part 1 of 4)
Current version of Quartus II does not have the information for the standard.
The 1.2 V (12 mA) and 1.2 V_HSTL_CLASS_I / II (12 mA and 14 mA respectively) are only supported on column I/O pins.
Output differential standard is only supported on PLLCLKOUT pin.
Dedicated differential standards are supported at row I/O pins.
Differential standards with external resistor network are supported at column I/O pins.
Output dedicated LVDS is only supported on row I/O pins. Input dedicated LVDS is supported at all I/O pins.
I/O Standard
I/O Standard
Table
1–44:
OCT_25_OHMS
OCT_50_OHMS
OCT_25_OHMS
OCT_50_OHMS
Current Strength
Current Strength or
or OCT Setting
OCT Setting
12 mA
16 mA
4 mA
8 mA
2 mA
4 mA
8 mA
Speed
Grade
290
(1)
(1)
(1)
-6
Column I/O Pins
Speed
Grade
Maximum Output Clock Toggle Rate on Cyclone III Devices (MHz)
117
Maximum Output Clock Toggle Rate Derating Factors
(1)
(1)
(1)
(1)
(1)
50
-6
Speed
Grade
240
Column I/O Pins
(1)
(1)
(1)
-7
Speed
Grade
123
52
(1)
(1)
(1)
(1)
(1)
-7
Speed
Grade
200
(1)
(1)
(1)
-8
-8 Speed
Grade
Speed
Grade
123
52
(1)
(1)
(1)
(1)
(1)
290
(1)
(1)
(1)
-6
(ps/pf)
Altera Corporation- Preliminary
Row I/O Pins
Speed
Grade
Speed
Grade
240
(1)
(1)
(1)
116
-7
50
(1)
(1)
(1)
(1)
(1)
-6
Row I/O Pins
Speed
Grade
200
Speed
(1)
(1)
(1)
Grade
-8
122
52
(1)
(1)
(1)
(1)
(1)
Preliminary
-7
March 2007
Dedicated Clock Outputs
Speed
Grade
290
(1)
(1)
(1)
-6
Speed
Grade
122
52
(1)
(1)
(1)
(1)
(1)
-8
Speed
Grade
240
Preliminary
(1)
(1)
(1)
-7
Speed
Grade
200
(1)
(1)
(1)
-8