EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 508

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Typical Design Performance
1–98
Cyclone III Handbook
PPDS
RSDS
3.3-V LVTTL
3.3-V LVCMOS
3.0-V LVTTL
3.0-V LVCMOS
Table 1–65. EP3C25 Row Pin Differential I/O Timing Parameters (Part 2 of 2)
Table 1–66. EP3C40 Column I/O Pin Input Timing Parameters for Single-Ended I/O Standards (Part 1 of 4)
I/O Standard
I/O Standard
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
Strength
Current
EP3C40 I/O Timing Parameters
Table 1–66
parameters for EP3C40 devices.
Clock
through
GCLK
GCLK PLL
GCLK
GCLK PLL
Parameter
Clock
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SU
SU
SU
SU
SU
SU
SU
SU
H
H
H
H
H
H
H
H
Table 1–71
Parameter
t
t
t
t
-0.628
-3.569
-0.628
-3.569
-0.628
-3.569
-0.628
-3.569
CO
CO
CO
CO
0.828
3.769
0.828
3.769
0.828
3.769
0.828
3.769
show the maximum I/O timing
-6
Specification
4.036
1.247
4.036
1.247
-6
-0.682
-3.930
-0.682
-3.930
-0.682
-3.930
-0.682
-3.930
0.913
4.161
0.913
4.161
0.913
4.161
0.913
4.161
Altera Corporation- Preliminary
-7
Specification
4.431
1.361
4.431
1.361
-7
-0.652
-4.202
-0.652
-4.202
-0.652
-4.202
-0.652
-4.202
0.915
4.465
0.915
4.465
0.915
4.465
0.915
4.465
-8
4.849
1.491
4.849
1.491
-8
March 2007
Units
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Units

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