EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 334

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Cyclone III Hot-Socketing Specifications
11–2
Cyclone III Device Handbook, Volume 1
Devices Can Be Driven Before Power-Up
You can drive signals into the I/O pins, dedicated input pins, and
dedicated clock pins of Cyclone III devices before or during power-up or
power-down without damaging the device. Cyclone III devices support
any power-up or power-down sequence (V
system level design.
I/O Pins Remain Tri-Stated During Power-Up
A device that does not support hot socketing may interrupt system
operation or cause contention by driving out before or during power-up.
In a hot-socketing situation, the output buffers of the Cyclone III device
are turned off during system power-up or power-down. A Cyclone III
device also does not drive out until the device is configured and has
attained proper operating conditions.
You can power up or power down the V
sequence. The maximum power ramp rate for fast POR time is 3 ms, and
50 ms for standard POR time, respectively. The minimum power ramp
rate is 50 us. V
operation. All V
not used), and must be powered-up and powered-down at the same time.
V
capacitor and ferrite bead. During hot socketing, the I/O pin capacitance
is less than 15 pF and the clock pin capacitance is less than 20 pF. Cyclone
III devices meet the following hot socketing specification:
■
■
For ramp rates faster than 10 ns on I/O pins, |I
with the equation I=C dv/dt, where C is the I/O pin capacitance and
dv/dt is the slew rate. The hot-socketing specification takes into account
the pin capacitance but not board trace and external loading capacitance.
You must consider additional or separate capacitance for trace, connector,
and loading.
I
specification applies when all V
powered-up or powered-down conditions.
A possible concern for semiconductor devices in general regarding hot
socketing is the potential for latch-up. Latch-up can occur when electrical
subsystems are hot socketed into an active system. During hot socketing,
the signal pins may be connected and driven by the active system before
IOPIN
CCD_PLL
The hot-socketing DC specification is | I
The hot-socketing AC specification is | I
rate of 10 ns or more.
is the current for any user I/O pin on the device. The DC
must always be connected to V
CCIO
CCA
for all I/O banks should be powered-up during device
pins must be powered to 2.5-V (even when PLLs are
CC
supplied to the device is stable in the
CCIO
CCINT
Altera Corporation-Preliminary
, V
CCIO
IOPIN
IOPIN
CCA
through a decoupling
IOPIN
and V
, and V
| < 8 mA for the ramp
| < 300 uA.
| can be obtained
CCINT
CCINT
) to simplify
pins in any
March 2007