EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 147

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
Datasheets

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Spread-
Spectrum
Clocking
PLL
Specifications
Board Layout
Altera Corporation-Preliminary
March 2007
f
low until the PLL finishes dynamic phase shifting. You can perform
another dynamic phase shift after the phasedone signal goes from low
to high.
Depending on the VCO and scanclk frequencies, phasedone low time
may be greater than or less than one scanclk cycle. The maximum time
for reconfiguring phase shift dynamically is to be determined (TBD)
based on device characterization.
After phasedone goes from low to high, you can perform another
dynamic phase shift. Phasestep pulses must be at least one scanclk
cycle apart.
For details on the altpll_reconfig megawizard Plug-In Manager, refer to
the altpll_reconfig Megafunction Users Guide.
Cyclone III devices can accept a spread-spectrum input with typical
modulation frequencies. However, the device cannot automatically
detect that the input is a spread-spectrum signal. Instead, the input signal
looks like deterministic jitter at the input of the PLL. Cyclone III PLLs can
track a spread spectrum input clock as long as it is within the input jitter
tolerance specifications. Cyclone III devices cannot internally generate
spread spectrum signals.
Refer to the Cyclone III Device datasheet in the DC and Switching
Characteristics chapter in Volume 1 of the Cyclone III Device Handbook for
information on PLL timing specifications.
The PLL circuits in Cyclone III devices contain analog components
embedded in a digital device. These analog components have separate
power and ground pins to minimize noise generated by the digital
components.
VCCA and GNDA
Each Cyclone III PLL uses separate VCC and ground pin pairs for their
analog circuitry. The analog circuit power and ground pin for each PLL is
called VCCA<PLL number> and GNDA. Connect the VCCA power pin to a
2.5-V power supply, even if you do not use the PLL. Run a thick trace from
the power supply to each VCCA pin. The traces should be at least 20 mils
thick.
Cyclone III Device Handbook, Volume 1
Spread-Spectrum Clocking
6–47

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