EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 310

no-image

EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
Datasheets

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3C16F256I7N
Manufacturer:
IR
Quantity:
14 520
Part Number:
EP3C16F256I7N
Manufacturer:
ALTERA31
Quantity:
214
Part Number:
EP3C16F256I7N
Manufacturer:
ALTERA
Quantity:
90
Part Number:
EP3C16F256I7N
Manufacturer:
XILINX
0
Part Number:
EP3C16F256I7N
Manufacturer:
ALTERA
0
Part Number:
EP3C16F256I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP3C16F256I7N
0
Configuring Cyclone III Devices
10–74
Cyclone III Device Handbook, Volume 1
To configure a single device in a JTAG chain, the programming software
places all other devices in bypass mode. In bypass mode, devices pass
programming data from the TDI pin to the TDO pin through a single
bypass register without being affected internally. This scheme enables the
programming software to program or verify the target device.
Configuration data driven into the device appears on the TDO pin one
clock cycle later.
The Quartus II software verifies successful JTAG configuration upon
completion. At the end of configuration, the software checks the state of
CONF_DONE through the JTAG port. When Quartus II generates a (.jam)
file for a multi-device chain, it contains instructions so that all the devices
in the chain are initialized at the same time. If CONF_DONE is not high, the
Quartus II software indicates that configuration has failed. If CONF_DONE
is high, the software indicates that configuration was successful. After the
configuration bitstream is transmitted serially via the JTAG TDI port, the
TCK port is clocked an additional 3,180 cycles to perform device
initialization.
Cyclone III devices have dedicated JTAG pins that always function as
JTAG pins. Not only can you perform JTAG testing on Cyclone III devices
before and after, but also during configuration. Cyclone III devices
support the BYPASS, IDCODE, and SAMPLE instructions during
configuration without interrupting configuration. All other JTAG
instructions may only be issued by first interrupting configuration and
reprogramming I/O pins using the ACTIVE_DISENGAGE and
CONFIG_IO instructions.
The CONFIG_IO instruction allows I/O buffers to be configured via the
JTAG port and when issued after the ACTIVE_DISENGAGE instruction,
interrupts configuration. This instruction allows you to perform
board-level testing prior to configuring the Cyclone III device or waiting
for a configuration device to complete configuration. In Cyclone III
devices, prior to issuing the CONFIG_IO instruction, you must issue the
ACTIVE_DISENGAGE instruction. This is because in Cyclone III devices,
the CONFIG_IO instruction does not hold nSTATUS low until
reconfiguration, so you must disengage the active configuration mode
controller when active configuration is interrupted. The
ACTIVE_DISENGAGE instruction places the active configuration mode
controllers in an idle state prior to JTAG programming. Additionally, the
ACTIVE_ENGAGE instruction allows you to re-engage an already
disengaged active configuration mode controller.
1
You must follow a specific flow when executing the
CONFIG_IO, ACTIVE_DISENGAGE, and ACTIVE_ENGAGE
JTAG instructions in Cyclone III devices. For information on the
instruction flow, refer to
“JTAG Configuration” on page 10–70
Altera Corporation-Preliminary
March 2007

Related parts for EP3C16F256I7N