EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 227
EP3C16F256I7N
Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Figure 9–5. DQS/CQ/CQ# Pins in EP3C5, EP3C10, EP3C16, and EP3C25 Devices in the 144-Pin EQFP
Package
Altera Corporation-Preliminary
March 2007
DQS1L/CQ1L#
DQS0L/CQ1L
In Cyclone III devices, the ×9 mode uses the same DQ and DQS pins as the
×8 mode, and one additional DQ pin that serves as a regular I/O pin in ×8
mode. The ×18 mode uses the same DQ and DQS pins as ×16 mode, with
two additional
Similarly, the ×36 mode uses the same DQ and DQS pins as ×32 mode, with
four additional DQ pins that serve as regular I/O pins in ×32 mode. When
not used as DQ or DQS pins, the memory interface pins are available as
regular I/O pins.
Optional Parity, DM, and ECC Pins
Cyclone III devices support parity in the ×9, ×18, and ×36 modes. One
parity bit is available per eight bits of data pins. You can use any of the DQ
pins for parity in the Cyclone III devices because the parity pins are
treated and configured like DQ pins.
I/O Bank 8
I/O Bank 3
EP3C5, EP3C10, EP3C16, and
EP3C25 Devices
DQ
144-pin EQFP
pins that serve as regular I/O pins in ×16 mode.
I/O Bank 7
I/O Bank 4
Cyclone III Memory Interfaces Pin Support
Cyclone III Device Handbook, Volume 1
DQS0R/CQ1R
DQS1R/CQ1R#
9–13
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