EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 457

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Cyclone III Device Datasheet: DC & Switching Characteristics
Altera Corporation-Preliminary
March 2007
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
(7)
RSDS
RSDS_E_1R
RSDS_E_3R
3.0-V
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.2-V LVTTL/LVCMOS
Table 1–45. Maximum Output Clock Toggle Rate Derating Factors on Cyclone III
Devices (Part 4 of 4)
Current version of Quartus II does not have the information for the standard.
The 1.2 V (12 mA) and 1.2 V_HSTL_CLASS_I / II (12 mA and 14 mA respectively) are only supported on column
I/O pins.
Output differential standard is only supported on PLLCLKOUT pin.
Dedicated differential standards are supported at row I/O pins.
Differential standards with external resistor network are supported at column I/O pins.
Output dedicated LVDS is only supported on row I/O pins. Input dedicated LVDS is supported at all I/O pins.
Indicate the lowest value of derating factor.
I/O Standard
Table
1–45:
Current Strength or
OCT_25_OHMS
OCT_50_OHMS
OCT_25_OHMS
OCT_50_OHMS
OCT_25_OHMS
OCT_50_OHMS
OCT_25_OHMS
OCT_50_OHMS
OCT Setting
-
-
-
Speed
Grade
240
290
Maximum Output Clock Toggle Rate Derating Factors
(4)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
-6
Column I/O Pins
Speed
Grade
200
240
(4)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
-7
-8 Speed
Grade
160
200
(4)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(ps/pf)
Speed
Grade
240
290
(1)
(5)
(5)
(1)
(1)
(1)
(1)
(1)
(1)
-6
Cyclone III Handbook
Row I/O Pins
Speed
Grade
200
240
(1)
(5)
(5)
(1)
(1)
(1)
(1)
(1)
(1)
Preliminary
-7
Speed
Grade
160
200
(1)
(5)
(5)
(1)
(1)
(1)
(1)
(1)
(1)
-8
1–47