EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 182

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Cyclone III Device I/O Features
7–30
Cyclone III Device Handbook, Volume 1
Each Cyclone III I/O bank has its own V
can only support one V
3.3 V. Although there can only be one V
Cyclone III devices permit additional input signaling capabilities.
Any number of supported single-ended or differential standards can be
simultaneously supported in a single I/O bank, as long as they use
compatible V
bank with a 2.5-V V
outputs, 2.5-V LVDS-compatible inputs and outputs, and 3.0-V LVTTL
and 3.3-V LVCMOS inputs only.
Voltage-referenced standards can be supported in an I/O bank using any
number of single-ended or differential standards, as long as they use the
same V
implement both SSTL-2 and SSTL-18 in your Cyclone III device, I/O pins
using these standards—because they require different V
be in different banks from each other. However, the same I/O bank can
support SSTL-2 and 2.5-V LVCMOS with the V
V
EP3C40
EP3C55
EP3C80
EP3C120
Table 7–7. Number of V
REF
Device
set to 1.25 V.
REF
and a compatible V
CCIO
Package
PQFP
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
levels for input and output pins. For example, an I/O
CCIO
REF
CCIO
setting can support 2.5-V LVTTL inputs and
Pins Per I/O Banks (Part 2 of 2)
setting from among 1.2, 1.5, 1.8, 2.5, 3.0, or
Pin Count
CCIO
240
324
484
780
484
780
484
780
484
780
value. For example, if you choose to
CCIO
CCIO
1
4
4
4
4
2
2
3
3
3
3
Altera Corporation-Preliminary
voltage per I/O bank,
pins. Any single I/O bank
2
4
4
4
4
2
2
3
3
3
3
CCIO
3
4
4
4
4
2
2
3
3
3
3
set to 2.5 V and the
I/O Banks
4
4
4
4
4
2
2
3
3
3
3
REF
values—must
5
4
4
4
4
2
2
3
3
3
3
March 2007
6
4
4
4
4
2
2
3
3
3
3
7
4
4
4
2
2
3
3
3
3
4
8
4
4
4
4
2
2
3
3
3
3

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