OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 292

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
Table 260. Cortex M0- instruction summary
[1]
[2]
[3]
[4]
Operation
Store
Push
Pop
Branch
Extend
Reverse
State change
Hint
Barriers
Depends on multiplier implementation.
N is the number of elements.
N is the number of elements in the stack-pop list including PC and assumes load or store
does not generate a HardFault exception.
3 if taken, 1 if not taken.
All information provided in this document is subject to legal disclaimers.
Description
Halfword, immediate offset
Byte, immediate offset
Word, register offset
Halfword, register offset
Byte, register offset
SP-relative
Multiple
Push
Push with link register
Pop
Pop and return
Conditional
Unconditional
With link
With exchange
With link and exchange
Signed halfword to word
Signed byte to word
Unsigned halfword
Unsigned byte
Bytes in word
Bytes in both halfwords
Signed bottom half word
Supervisor Call
Disable interrupts
Enable interrupts
Read special register
Write special register
Send event
Wait for event
Wait for interrupt
Yield
No operation
Instruction synchronization
Data memory
Data synchronization
Rev. 1 — 10 September 2010
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
Assembler
STRH Rd, [Rn, #<imm>]
STRB Rd, [Rn, #<imm>]
STR Rd, [Rn, Rm]
STRH Rd, [Rn, Rm]
STRB Rd, [Rn, Rm]
STR Rd, [SP, #<imm>]
STM Rn!, {<loreglist>}
PUSH {<loreglist>}
PUSH {<loreglist>, LR}
POP {<loreglist>}
POP {<loreglist>, PC}
B<cc> <label>
B <label>
BL <label>
BX Rm
BLX Rm
SXTH Rd, Rm
SXTB Rd, Rm
UXTH Rd, Rm
UXTB Rd, Rm
REV Rd, Rm
REV16 Rd, Rm
REVSH Rd, Rm
SVC <imm>
CPSID i
CPSIE i
MRS Rd, <specreg>
MSR <specreg>, Rn
SEV
WFE
WFI
YIELD
NOP
ISB
DMB
DSB
[7]
UM10415
© NXP B.V. 2010. All rights reserved.
2
2
2
2
1
1
1
1
1
1
1
4
Cycles
2
2
1 + N
1 + N
1 + N
1 + N
4 + N
1 or 3
3
4
3
3
1
1
-
1
4
4
2
2
1
1
4
4
[5]
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[6]
[6]
[2]
[2]
[2]
[2]
[3]
[4]