OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 11

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
Table 3.
UM10415
User manual
Name
SYSRSTSTAT
-
SYSPLLCLKSEL
SYSPLLCLKUEN
-
MAINCLKSEL
MAINCLKUEN
SYSAHBCLKDIV
-
SYSAHBCLKCTRL
-
SSP0CLKDIV
UARTCLKDIV
-
WDTCLKSEL
WDTCLKUEN
WDTCLKDIV
-
CLKOUTCLKSEL
CLKOUTUEN
CLKOUTDIV
-
PIOPORCAP0
PIOPORCAP1
-
BODCTRL
-
SYSTCKCAL
-
STARTAPRP0
STARTERP0
STARTRSRP0CLR
STARTSRP0
-
PDSLEEPCFG
PDAWAKECFG
Register overview: system control block (base address 0x4004 8000)
Access
R
-
R/W
R/W
-
R/W
R/W
R/W
-
R/W
-
R/W
R/W
-
R/W
R/W
R/W
-
R/W
R/W
R/W
-
R
R
R
R/W
-
R/W
-
R/W
R/W
W
R
-
R/W
R/W
Address offset Description
0x030
0x034 - 0x03C
0x040
0x044
0x048 - 0x06C
0x070
0x074
0x078
0x07C
0x080
0x084 - 0x090
0x094
0x098
0x0A0-0x0CC
0x0D0
0x0D4
0x0D8
0x0DC
0x0E0
0x0E4
0x0E8
0x0EC - 0x0FC Reserved
0x100
0x104
0x108 - 0x14C
0x150
0x154
0x158
0x15C - 0x1FC Reserved
0x200
0x204
0x208
0x20C
0x210 - 0x22C
0x230
0x234
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
System reset status register
Reserved
System PLL clock source select
System PLL clock source update enable
Reserved
Main clock source select
Main clock source update enable
System AHB clock divider
Reserved
System AHB clock control
Reserved
SPI0 clock divider
UART clock divider
Reserved
WDT clock source select
WDT clock source update enable
WDT clock divider
Reserved
CLKOUT clock source select
CLKOUT clock source update enable
CLKOUT clock divider
POR captured PIO status 0
POR captured PIO status 1
Reserved
BOD control
Reserved
System tick counter calibration
Start logic edge control register 0
Start logic signal enable register 0
Start logic reset register 0
Start logic status register 0
Reserved
Power-down states in Deep-sleep mode
Power-down states after wake-up from
Deep-sleep mode
Chapter 3: EM773 System configuration
…continued
Reset
value
0x000
-
0x000
0x000
-
0x000
0x000
0x001
-
0x85F
-
0x000
0x000
-
0x000
0x000
0x000
-
0x000
0x000
0x000
-
user
dependent
user
dependent
-
0x000
-
0x004
-
n/a
n/a
-
0x0000
0000
0x0000
EDF0
UM10415
© NXP B.V. 2010. All rights reserved.
Reference
Table 11
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Table 12
Table 13
-
Table 14
Table 15
Table 16
-
Table 17
-
Table 18
Table 19
-
Table 20
Table 21
Table 22
-
Table 23
Table 24
Table 25
-
Table 26
Table 27
-
Table 28
-
Table 29
-
Table 30
Table 31
Table 32
Table 33
-
Table 35
Table 36
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