OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 23
OM13006,598
Manufacturer Part Number
OM13006,598
Description
BOARD EVAL EM773 METER EU PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13006,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6681
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NXP Semiconductors
UM10415
User manual
3.4.24 POR captured PIO status register 1
3.4.25 BOD control register
Table 26.
The PIOPORCAP1 register captures the state (HIGH or LOW) of the PIO pins of port 2
(PIO2_8 to PIO2_11) and port 3 at power-on-reset. Each bit represents the reset state of
one PIO pin. This register is a read-only status register.
Table 27.
The BOD control register selects four separate threshold values for sending a BOD
interrupt to the NVIC and for forced reset. Reset and interrupt threshold values listed in
Table 28
Table 28.
Bit
11:0
23:12
31:24
Bit
0
1
2
3
4
5
6
7
8
9
31:10
Bit
1:0
Symbol
BODRSTLEV
Symbol
CAPPIO0_11 to
CAPPIO0_0
CAPPIO1_11 to
CAPPIO1_0
CAPPIO2_7 to
CAPPIO2_0
Symbol
CAPPIO2_8
CAPPIO2_9
CAPPIO2_10
CAPPIO2_11
CAPPIO3_0
CAPPIO3_1
CAPPIO3_2
CAPPIO3_3
CAPPIO3_4
CAPPIO3_5
-
are typical values.
POR captured PIO status registers 0 (PIOPORCAP0, address 0x4004 8100) bit
description
POR captured PIO status registers 1 (PIOPORCAP1, address 0x4004 8104) bit
description
BOD control register (BODCTRL, address 0x4004 8150) bit description
All information provided in this document is subject to legal disclaimers.
Value Description
00
01
10
11
Rev. 1 — 10 September 2010
Description
Raw reset status input PIO0_11 to
PIO0_0
Raw reset status input PIO1_11 to
PIO1_0
Raw reset status input PIO2_7 to
PIO2_0
Description
Raw reset status input PIO2_8
Raw reset status input PIO2_9
Raw reset status input PIO2_10
Raw reset status input PIO2_11
Raw reset status input PIO3_0
Raw reset status input PIO3_1
Raw reset status input PIO3_2
Raw reset status input PIO3_3
Raw reset status input PIO3_4
Raw reset status input PIO3_5
Reserved
BOD reset level
Level 0: The reset assertion threshold voltage is 1.46 V; the
reset de-assertion threshold voltage is 1.63 V.
Level 1: The reset assertion threshold voltage is 2.06 V; the
reset de-assertion threshold voltage is 2.15 V.
Level 2: The reset assertion threshold voltage is 2.35 V; the
reset de-assertion threshold voltage is 2.43 V.
Level 3: The reset assertion threshold voltage is 2.63 V; the
reset de-assertion threshold voltage is 2.71 V.
Chapter 3: EM773 System configuration
Reset value
User implementation dependent
User implementation dependent
User implementation dependent
Reset value
User implementation dependent
User implementation dependent
User implementation dependent
User implementation dependent
User implementation dependent
User implementation dependent
User implementation dependent
User implementation dependent
User implementation dependent
User implementation dependent
-
UM10415
© NXP B.V. 2010. All rights reserved.
Reset
value
00
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