OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 158

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
Table 149. Interrupt Register (TMR16B0IR - address 0x4000 C000) bit description
UM10415
User manual
Bit
0
1
2
3
4
31:5
Symbol
MR0 Interrupt
MR1 Interrupt
MR2 Interrupt
MR3 Interrupt
CR0 Interrupt
-
12.8.2 Timer Control Register (TMR16B0TCR)
12.8.3 Timer Counter (TMR16B0TC - address 0x4000 C008)
12.8.4 Prescale Register (TMR16B0PR - address 0x4000 C00C)
12.8.5 Prescale Counter register (TMR16B0PC - address 0x4000 C010)
12.8.6 Match Control Register (TMR16B0MCR)
The Timer Control Register (TCR) is used to control the operation of the counter/timer.
Table 150. Timer Control Register (TMR16B0TCR - address 0x4000 C004) bit description
The 16-bit Timer Counter is incremented when the Prescale Counter reaches its terminal
count. Unless it is reset before reaching its upper limit, the TC will count up through the
value 0x0000 FFFF and then wrap back to the value 0x0000 0000. This event does not
cause an interrupt, but a Match register can be used to detect an overflow if needed.
The 16-bit Prescale Register specifies the maximum value for the Prescale Counter.
The 16-bit Prescale Counter controls division of PCLK by some constant value before it is
applied to the Timer Counter. This allows control of the relationship between the resolution
of the timer and the maximum time before the timer overflows. The Prescale Counter is
incremented on every PCLK. When it reaches the value stored in the Prescale Register,
the Timer Counter is incremented, and the Prescale Counter is reset on the next PCLK.
This causes the TC to increment on every PCLK when PR = 0, every 2 PCLKs when
PR = 1, etc.
The Match Control Register is used to control what operations are performed when one of
the Match Registers matches the Timer Counter. The function of each of the bits is shown
in
Bit
0
1
31:2
Table
Description
Interrupt flag for match channel 0.
Interrupt flag for match channel 1.
Interrupt flag for match channel 2.
Interrupt flag for match channel 3.
Interrupt flag for capture channel 0 event.
Reserved
151.
Symbol
Counter Enable When one, the Timer Counter and Prescale Counter are
Counter Reset
-
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
Description
enabled for counting. When zero, the counters are
disabled.
When one, the Timer Counter and the Prescale Counter
are synchronously reset on the next positive edge of
PCLK. The counters remain reset until TCR[1] is
returned to zero.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
Chapter 12: EM773 16-bit counter/timer (CT16B0)
UM10415
© NXP B.V. 2010. All rights reserved.
Reset value
0
0
0
0
0
-
Reset value
0
0
NA
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