OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 40
OM13006,598
Manufacturer Part Number
OM13006,598
Description
BOARD EVAL EM773 METER EU PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13006,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6681
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NXP Semiconductors
4.3 Functional description
UM10415
User manual
4.2.2 General purpose registers 0 to 3
4.2.3 General purpose register 4
Table 43.
The general purpose registers retain data through the Deep power-down mode when
power is still applied to the V
Only a “cold” boot when all power has been completely removed from the chip will reset
the general purpose registers.
Table 44.
The general purpose register 4 retains data through the Deep power-down mode when
power is still applied to the V
Only a “cold” boot, when all power has been completely removed from the chip, will reset
the general purpose registers.
Remark: If there is a possibility that the external voltage applied on pin V
2.2 V during Deep power-down, the hysteresis of the WAKEUP input pin has to be
disabled in this register before entering Deep power-down mode in order for the chip to
wake up.
Table 45.
For details of entering and exiting Deep power-down mode, see
Bit
11
31:12
Bit
31:0
Bit
9:0
10
31:11
Symbol
DPDFLAG
-
Symbol
-
WAKEUPHYS
GPDATA
Symbol
GPDATA
Power control register (PCON, address 0x4003 8000) bit description
General purpose registers 0 to 3 (GPREG0 - GPREG3, address 0x4003 8004 to
0x4003 8010) bit description
General purpose register 4 (GPREG4, address 0x4003 8014) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
Value
0
1
-
Value
-
1
0
Description
Data retained during Deep power-down mode.
DD
DD
Description
Deep power-down flag
Read: Deep power-down mode not entered.
Write: No effect.
Read: Deep power-down mode entered.
Write: Clear the Deep power-down flag.
Reserved. Do not write ones to this bit.
pin but the chip has entered Deep power-down mode.
pin but the chip has entered Deep power-down mode.
Description
Reserved. Do not write ones to this bit.
WAKEUP pin hysteresis enable
Hysteresis for WAKEUP pin enabled.
Hysteresis for WAKUP pin disabled.
Data retained during Deep power-down mode.
Chapter 4: EM773 PMU (Power Management Unit)
Section
UM10415
© NXP B.V. 2010. All rights reserved.
3.7.
DD
drops below
…continued
Reset
value
0x0
40 of 310
0x0
0x0
0x0
Reset
value
0x0
0x0
Reset
value
0x0
0x0
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