OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 288

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
20.5.3.7.2 System Handler Priority Register 3
20.5.3.8 SCB usage hints and tips
20.5.4 System timer, SysTick
Table 253. SHPR2 register bit assignments
The bit assignments are:
Table 254. SHPR3 register bit assignments
Ensure software uses aligned 32-bit word size transactions to access all the SCB
registers.
When enabled, the timer counts down from the current value (SYST_CVR) to zero,
reloads (wraps) to the value in the SysTick Reload Value Register (SYST_RVR) on the
next clock edge, then decrements on subsequent clocks. When the counter transitions to
zero, the COUNTFLAG status bit is set to 1. The COUNTFLAG bit clears on reads.
Remark: The SYST_CVR value is UNKNOWN on reset. Software should write to the
register to clear it to zero before enabling the feature. This ensures the timer will count
from the SYST_RVR value rather than an arbitrary value when it is enabled.
Remark: If the SYST_RVR is zero, the timer will be maintained with a current value of
zero after it is reloaded with this value. This mechanism can be used to disable the feature
independently from the timer enable bit.
A write to the SYST_CVR will clear the register and the COUNTFLAG status bit. The write
causes the SYST_CVR to reload from the SYST_RVR on the next timer clock, however, it
does not trigger the SysTick exception logic. On a read, the current value is the value of
the register at the time the register is accessed.
Remark: When the processor is halted for debugging the counter does not decrement.
The system timer registers are:
Table 255. System timer registers summary
[1]
Bits
[31:24]
[23:0]
Bits
[31:24]
[23:16]
[15:0]
Address
0xE000E010
0xE000E014
0xE000E018
0xE000E01C
SysTick calibration value.
Name
PRI_15
PRI_14
-
Name
SYST_CSR
SYST_RVR
SYST_CVR
SYST_CALIB RO
All information provided in this document is subject to legal disclaimers.
Name
PRI_11
-
Rev. 1 — 10 September 2010
Function
Priority of system handler 15, SysTick exception
Priority of system handler 14, PendSV
Reserved
Type
RW
RW
RW
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
Function
Priority of system handler 11, SVCall
Reserved
Reset
value
0x00000000
Unknown
Unknown
0x00000004
[1]
Description
Section 20.5.4.1
Section 20–20.5.4.2
Section 20–20.5.4.3
Section 20–20.5.4.4
UM10415
© NXP B.V. 2010. All rights reserved.
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