OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 16
![BOARD EVAL EM773 METER EU PLUG](/photos/38/74/387412/om13006_sml.jpg)
OM13006,598
Manufacturer Part Number
OM13006,598
Description
BOARD EVAL EM773 METER EU PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13006,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6681
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NXP Semiconductors
UM10415
User manual
3.4.8 System reset status register
3.4.9 System PLL clock source select register
The SYSRSTSTAT register shows the source of the latest reset event. The bits are
cleared by writing a one to any of the bits. The POR event clears all other bits in this
register, but if another reset signal - for example EXTRST - remains asserted after the
POR signal is negated, then its bit is set to detected.
Table 11.
This register selects the clock source for the system PLL. The SYSPLLCLKUEN register
(see
Remark: When switching clock sources, both clocks must be running before the clock
source can be updated.
Table 12.
Bit
0
1
2
3
4
31:5
Bit
1:0
31:2
Section
Symbol
POR
EXTRST
WDT
BOD
SYSRST
-
Symbol
SEL
-
System reset status register (SYSRSTSTAT, address 0x4004 8030) bit description
System PLL clock source select register (SYSPLLCLKSEL, address 0x4004 8040)
bit description
3.4.10) must be toggled from LOW to HIGH for the update to take effect.
All information provided in this document is subject to legal disclaimers.
Value
00
01
10
11
-
Rev. 1 — 10 September 2010
Value
0
1
0
1
0
1
0
1
0
1
-
Description
System PLL clock source
IRC oscillator
System oscillator
Reserved
Reserved
Reserved
Description
POR reset status
no POR detected
POR detected
Status of the external RESET pin
no RESET event detected
RESET detected
Status of the Watchdog reset
no WDT reset detected
WDT reset detected
Status of the Brown-out detect reset
no BOD reset detected
BOD reset detected
Status of the software system reset
no System reset detected
System reset detected
Reserved
Chapter 3: EM773 System configuration
UM10415
© NXP B.V. 2010. All rights reserved.
Reset
value
0x0
0x0
0x0
0x0
0x0
0x00
Reset
value
0x00
0x00
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