OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 271

BOARD EVAL EM773 METER EU PLUG

OM13006,598

Manufacturer Part Number
OM13006,598
Description
BOARD EVAL EM773 METER EU PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Datasheets

Specifications of OM13006,598

Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6681
NXP Semiconductors
UM10415
User manual
20.4.7.1.1 Syntax
20.4.7.1.2 Operation
20.4.7.1.3 Restrictions
20.4.7.1.4 Condition flags
20.4.7.1.5 Examples
20.4.7.2.1 Syntax
20.4.7.2.2 Operation
20.4.7.1 BKPT
20.4.7.2 CPS
Table 236. Miscellaneous instructions
Breakpoint.
BKPT #imm
where:
The BKPT instruction causes the processor to enter Debug state. Debug tools can use
this to investigate system state when the instruction at a particular address is reached.
imm is ignored by the processor. If required, a debugger can use it to store additional
information about the breakpoint.
The processor might also produce a HardFault or go in to lockup if a debugger is not
attached when a BKPT instruction is executed. See
information.
There are no restrictions.
This instruction does not change the flags.
Change Processor State.
CPSID i
CPSIE i
CPS changes the PRIMASK special register values. CPSID causes interrupts to be
disabled by setting PRIMASK. CPSIE cause interrupts to be enabled by clearing
PRIMASK.See
Mnemonic
SVC
WFE
WFI
imm is an integer in the range 0-255.
BKPT #0
Section 20–20.3.1.3.6
All information provided in this document is subject to legal disclaimers.
; Breakpoint with immediate value set to 0x0.
Brief description
Supervisor Call
Wait For Event
Wait For Interrupt
Rev. 1 — 10 September 2010
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
for more information about these registers.
Section 20–20.3.4.1
UM10415
See
Section 20–20.4.7.
10
Section 20–20.4.7.
11
Section 20–20.4.7.
12
© NXP B.V. 2010. All rights reserved.
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