OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 166
OM13006,598
Manufacturer Part Number
OM13006,598
Description
BOARD EVAL EM773 METER EU PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13006,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6681
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13.1 How to read this chapter
13.2 Basic configuration
13.3 Features
13.4 Applications
UM10415
User manual
The 32-bit timer blocks are identical for all EM773 parts.
The CT32B0/1 are configured using the following registers:
1. Pins: The CT32B0/1 pins must be configured in the IOCONFIG register block
2. Power and peripheral clock: In the SYSAHBCLKCTRL register, set bit 9 and bit 10
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UM10415
Chapter 13: EM773 32-bit counter/timers (CT32B0/1)
Rev. 1 — 10 September 2010
(Section
(Table
Two 32-bit counter/timers with a programmable 32-bit prescaler.
Counter or Timer operation.
One 32-bit capture channel that can take a snapshot of the timer value when an input
signal transitions. A capture event may also optionally generate an interrupt.
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Four external outputs corresponding to match registers with the following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
For each timer, up to four match registers can be configured as PWM allowing to use
up to three match outputs as single edge controlled PWM outputs.
Interval timer for counting internal events
Pulse Width Demodulator via capture input
Free running timer
Pulse Width Modulator via match outputs
17).
6.4.1).
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
© NXP B.V. 2010. All rights reserved.
User manual
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