OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 126

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
10.11.4 Slave Transmitter mode
In the slave transmitter mode, a number of data bytes are transmitted to a master receiver
(see
and I2CON have been initialized, the I
address followed by the data direction bit which must be “1” (R) for the I
operate in the slave transmitter mode. After its own slave address and the R bit have been
received, the serial interrupt flag (SI) is set and a valid status code can be read from
I2STAT. This status code is used to vector to a state service routine, and the appropriate
action to be taken for each of these status codes is detailed in
transmitter mode may also be entered if arbitration is lost while the I
master mode (see state 0xB0).
If the AA bit is reset during a transfer, the I
and enter state 0xC0 or 0xC8. The I
and will ignore the master receiver if it continues the transfer. Thus the master receiver
receives all 1s as serial data. While AA is reset, the I
slave address or a General Call address. However, the I
address recognition may be resumed at any time by setting AA. This means that the AA
bit may be used to temporarily isolate the I
Figure
26). Data transfer is initialized as in the slave receiver mode. When I2ADR
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
2
C block is switched to the not addressed slave mode
2
C block waits until it is addressed by its own slave
2
C block will transmit the last byte of the transfer
2
C block from the I
Chapter 10: EM773 I2C-bus interface
2
C block does not respond to its own
2
C-bus is still monitored, and
2
C-bus.
Table
2
134. The slave
C block is in the
UM10415
© NXP B.V. 2010. All rights reserved.
2
C block to
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