OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 245
![BOARD EVAL EM773 METER EU PLUG](/photos/38/74/387412/om13006_sml.jpg)
OM13006,598
Manufacturer Part Number
OM13006,598
Description
BOARD EVAL EM773 METER EU PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13006,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6681
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NXP Semiconductors
20.4 Instruction set
UM10415
User manual
20.3.5.1.3 Sleep-on-exit
20.3.5.2.1 Wake-up from WFI or sleep-on-exit
20.3.5.2.2 Wake-up from WFE
20.3.5.2 Wake-up from sleep mode
20.3.5.3 Power management programming hints
20.4.1 Instruction set summary
If the SLEEPONEXIT bit of the SCR is set to 1, when the processor completes the
execution of an exception handler and returns to Thread mode it immediately enters sleep
mode. Use this mechanism in applications that only require the processor to run when an
interrupt occurs.
The conditions for the processor to wake-up depend on the mechanism that caused it to
enter sleep mode.
Normally, the processor wakes up only when it detects an exception with sufficient priority
to cause exception entry.
Some embedded systems might have to execute system restore tasks after the processor
wakes up, and before it executes an interrupt handler. To achieve this set the PRIMASK
bit to 1. If an interrupt arrives that is enabled and has a higher priority than current
exception priority, the processor wakes up but does not execute the interrupt handler until
the processor sets PRIMASK to zero. For more information about PRIMASK, see
Section
The processor wakes up if:
In addition, if the SEVONPEND bit in the SCR is set to 1, any new pending interrupt
triggers an event and wakes up the processor, even if the interrupt is disabled or has
insufficient priority to cause exception entry. For more information about the SCR see
Section
ISO/IEC C cannot directly generate the WFI, WFE, and SEV instructions. The CMSIS
provides the following intrinsic functions for these instructions:
void __WFE(void) // Wait for Event
void __WFI(void) // Wait for Interrupt
void __SEV(void) // Send Event
The processor implements a version of the Thumb instruction set.
supported instructions.
Remark: In
•
•
it detects an exception with sufficient priority to cause exception entry
in a multiprocessor system, another processor in the system executes a SEV
instruction.
20–20.3.1.3.6.
20–20.5.3.5.
Table 227
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
Table 227
UM10415
© NXP B.V. 2010. All rights reserved.
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