LFXP3C-3TN100I Lattice, LFXP3C-3TN100I Datasheet - Page 368

• Manufacturer Part Number: LFXP3C-3TN100I
• Description: FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
• Manufacturer: Lattice

Specifications of LFXP3C-3TN100I

• Number Of Programmable I/os: 62
• Data Ram Size: 55296
• Supply Voltage (max): 3.465 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.71 V
• Package / Case: TQFP-100
• Package: 100TQFP
• Family Name: LatticeXP
• Device Logic Units: 3000
• Maximum Internal Frequency: 320 MHz
• Typical Operating Supply Voltage: 1.8|2.5|3.3 V
• Maximum Number Of User I/os: 62
• Ram Bits: 55296
• Re-programmability Support: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 18-5. Two PLL Clocking Scheme
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sysCLOCK
133MHz
CLKIN
CLKIN
pll1_nclk (133MHz)
FB
FB
DIV0
DIV0
DIV1
DIV1
N-stage TBUFs
HPPLL
PLL1
PPLL
PLL2
DIV2
DIV2
MCLK
DIV3
MCLK
DIV3
NCLK
NCLK
User interface
pll_mclk (133MHz)
pll_nclk (266MHz)
18-8
for the DDR SDRAM Controller IP Core
DDRCT_NP
IP Core
PIO
PIO
(133MHz)
ddr_clk_n
(133MHz)
ddr_clk
Board Timing Guidelines
DDR SDRAM
Memory