LFXP3C-3TN100I Lattice, LFXP3C-3TN100I Datasheet - Page 237

FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I

LFXP3C-3TN100I

Manufacturer Part Number
LFXP3C-3TN100I
Description
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer
Lattice
Datasheets

Specifications of LFXP3C-3TN100I

Number Of Programmable I/os
62
Data Ram Size
55296
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
TQFP-100
Package
100TQFP
Family Name
LatticeXP
Device Logic Units
3000
Maximum Internal Frequency
320 MHz
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Maximum Number Of User I/os
62
Ram Bits
55296
Re-programmability Support
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFXP3C-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Some reference documents that discuss board layout guidelines:
References
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
e-mail:
Internet: www.latticesemi.com
Revision History
• www.idt.com, IDT, PCB Design for Double Data Rate Memory.
• www.motorola.com, AN2582, Hardware and Layout Design Considerations for DDR Interfaces.
• www.micron.com, TN4607, DDR 333 Design Guide for Two DIMM Systems
• www.jedec.org – JEDEC Standard 79, Double Data Rate (DDR) SDRAM Specification
• www.micron.com – DDR SDRAM Data Sheets
• www.infinion.com – DDR SDRAM Data Sheets
• www.samsung.com – DDR SDRAM Data Sheets
• www.latticesemi.com – RD1019 QDR Memory Controller Reference Design for LatticeECP/EC devices
• www.toshiba.com – DDR FCRAM Data Sheet
• www.fujitsu.com – DDR FCRAM Data Sheet
• www.latticesemi.com – LatticeEC Advanced Evaluation Board User’s Guide
• www.latticesemi.com – DDR SDRAM Controller (Pipelined Version for LatticeECP/EC Devices) User's
February 2007
Guide
+1-503-268-8001 (Outside North America)
techsupport@latticesemi.com
Date
Version
03.2
Previous Lattice releases.
Updated Generic High Speed DDR Implementation section.
Updated Appendix D.
10-18
Change Summary
LatticeECP/EC and LatticeXP
DDR Usage Guide

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