LFXP3C-3TN100I Lattice, LFXP3C-3TN100I Datasheet - Page 244

FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I

LFXP3C-3TN100I

Manufacturer Part Number
LFXP3C-3TN100I
Description
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer
Lattice
Datasheets

Specifications of LFXP3C-3TN100I

Number Of Programmable I/os
62
Data Ram Size
55296
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
TQFP-100
Package
100TQFP
Family Name
LatticeXP
Device Logic Units
3000
Maximum Internal Frequency
320 MHz
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Maximum Number Of User I/os
62
Ram Bits
55296
Re-programmability Support
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFXP3C-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
--*******DDR Output register *******************************************
--*******Bidirectional Buffer********************************************
--******DQS DLL Component*************************************************
--****** DQS Delay block***************************************************
component ODDRXB
end component;
component BB
end component;
component DQSDLL
end component;
component DQSBUFB
end component;
signal dqsbuf : std_logic;
signal dqsdel : std_logic;
signal ddrclkpol_sig : std_logic;
signal ddrin : std_logic_vector(7 downto 0 );
signal ddrout : std_logic_vector(7 downto 0 );
signal tridata : std_logic_vector(7 downto 0 );
signal dqsout : std_logic;
signal tridqs : std_logic;
signal dqsin : std_logic;
signal vcc_net : std_logic;
signal gnd_net : std_logic;
port(
port(
port(
port(
CLK
DA
DB
LSR
Q
I
T
O
B
CLK
RST
UDDCNTL
LOCK
DQSDEL
DQSI
CLK
READ
DQSDEL
DQSO
DDRCLKPOL
DQSC
PRMBDET
: in STD_LOGIC;
: in STD_LOGIC;
: out STD_LOGIC;
: inout STD_LOGIC);
: in STD_LOGIC;
: in STD_LOGIC;
: in STD_LOGIC;
: in STD_LOGIC;
: out STD_LOGIC);
: in STD_LOGIC;
: in STD_LOGIC;
: in STD_LOGIC;
: out STD_LOGIC;
: out STD_LOGIC);
: in STD_LOGIC;
: in STD_LOGIC;
: in STD_LOGIC;
: in STD_LOGIC;
: out STD_LOGIC;
: out STD_LOGIC;
: out STD_LOGIC;
: out STD_LOGIC);
10-25
LatticeECP/EC and LatticeXP
DDR Usage Guide

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