EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 504

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

29.5.17 LCD_SYNCBUSY - Synchronization Busy Register
31:1
0
31:20
19
18
17
16
15:8
7
6
5
4
3
2
1
0
Bit
Offset
0x064
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
Reserved
REGFREEZE
When set, the update of the LCD is postponed until this bit is cleared. Use this bit to update several registers simultaneously.
Reserved
SEGD7L
Set when the value written to LCD_SEGD7L is being synchronized.
SEGD6L
Set when the value written to LCD_SEGD6L is being synchronized.
SEGD5L
Set when the value written to LCD_SEGD5L is being synchronized.
SEGD4L
Set when the value written to LCD_SEGD4L is being synchronized.
Reserved
SEGD3L
Set when the value written to LCD_SEGD3L is being synchronized.
SEGD2L
Set when the value written to LCD_SEGD2L is being synchronized.
SEGD1L
Set when the value written to LCD_SEGD1L is being synchronized.
SEGD0L
Set when the value written to LCD_SEGD0L is being synchronized.
AREGB
Set when the value written to LCD_AREGB is being synchronized.
AREGA
Set when the value written to LCD_AREGA is being synchronized.
BACTRL
Set when the value written to LCD_BACTRL is being synchronized.
CTRL
Set when the value written to LCD_CTRL is being synchronized.
Name
Name
Value
0
1
Mode
UPDATE
FREEZE
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
R
R
R
R
R
R
R
R
R
R
R
R
Access
Access
Description
Each write access to an LCD register is updated into the Low Frequency domain as
soon as possible.
The LCD is not updated with the new written value.
...the world's most energy friendly microcontrollers
504
Bit Position
Register Update Freeze
LCD_SEGD7L Register Busy
LCD_SEGD6L Register Busy
LCD_SEGD5L Register Busy
LCD_SEGD4L Register Busy
LCD_SEGD3L Register Busy
LCD_SEGD2L Register Busy
LCD_SEGD1L Register Busy
LCD_SEGD0L Register Busy
LCD_AREGB Register Busy
LCD_AREGA Register Busy
LCD_BACTRL Register Busy
LCD_CTRL Register Busy
Description
Description
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