EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 118

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.5.19 CMU_SYNCBUSY - Synchronization Busy Register
5
4
3
2
1
0
31:7
6
5
4
3
2
1
0
Bit
Offset
0x050
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
TIMER1
Set to enable the clock for TIMER1.
TIMER0
Set to enable the clock for TIMER0.
USART1
Set to enable the clock for USART1.
USART0
Set to enable the clock for USART0.
ACMP1
Set to enable the clock for ACMP1.
ACMP0
Set to enable the clock for ACMP0.
Reserved
LFBPRESC0
Used to check the synchronization status of CMU_LFBPRESC0.
Reserved
LFBCLKEN0
Used to check the synchronization status of CMU_LFBCLKEN0.
Reserved
LFAPRESC0
Used to check the synchronization status of CMU_LFAPRESC0.
Reserved
LFACLKEN0
Used to check the synchronization status of CMU_LFACLKEN0.
Name
Name
Value
1
Value
0
1
Value
0
1
Description
CMU_LFBPRESC0 is busy synchronizing new value
Description
CMU_LFBCLKEN0 is ready for update
CMU_LFBCLKEN0 is busy synchronizing new value
Description
CMU_LFAPRESC0 is ready for update
CMU_LFAPRESC0 is busy synchronizing new value
0
0
0
0
0
0
0
0
0
0
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
R
R
R
R
Access
Access
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118
Bit Position
Timer 1 Clock Enable
Timer 0 Clock Enable
Universal Synchronous/Asynchronous Receiver/Transmitter 1
Clock Enable
Universal Synchronous/Asynchronous Receiver/Transmitter 0
Clock Enable
Analog Comparator 1 Clock Enable
Analog Comparator 0 Clock Enable
Low Frequency B Prescaler 0 Busy
Low Frequency B Clock Enable 0 Busy
Low Frequency A Prescaler 0 Busy
Low Frequency A Clock Enable 0 Busy
Description
Description
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