EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 432

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

26.3.2.6 Cascaded Non-inverting PGA
26.3.2.7 Two Opamp Differential Amplifier
2010-12-21 - d0034_Rev0.90
This mode enables the opamp signals to be internally configured to cascade two or three opamps in non-
inverting mode as shown in Figure 26.7 (p. 432) . In both cases the negative input for all opamps will be
connected to the resistor ladder by setting the OPAxNEGSEL bitfield to OPATAP. In addition the resistor
ladder input must be set to VSS or NEGPADx in the OPAxRESINMUX in DACn_OPAxMUX. When
cascaded, the positive input on OPA0 is configured by the OPA0POSSEL bitfield. The output from OPA0
can be connected to OPA1 to create the second stage by setting NEXTOUT in DACn_OPA0MUX. To
complete the stage, the OPA1POSSEL bitfield must be set to OPA0INP in DACn_OPA1MUX. Similarly,
the last stage can be created by setting NEXTOUT in DACn_OPA1MUX and OPA2POSSEL bitfield to
OPA1INP in DACn_OPA2MUX.
Figure 26.7. Cascaded Non-inverting PGA Overview
Table 26.6. Cascaded Non-inverting PGA Configuration
This mode enables OPA1 and OPA2 to be internally configured to form a two opamp differential
amplifier as shown in Figure 26.8 (p. 433) . For OPA1, the positive input can be connected to any
OPA
OPA1
OPA1
OPA2
OPA2
OPA2
OPA
OPA0
OPA0
OPA0
OPA0
OPA1
OPA1
OPA1
OPA1
OPA2
OPA2
OPA2
R1
VIN
+
-
R2
VOUT1= VIN(1+ R2/R1)
R1
OPA bitfields
RESINMUX
OUTPEN
POSSEL
NEGSEL
RESINMUX
OPA bitfields
POSSEL
NEGSEL
RESINMUX
OUTPEN
POSSEL
NEGSEL
RESINMUX
OUTPEN
POSSEL
NEGSEL
RESINMUX
+
-
R2
VOUT2= VIN(1+ R2/R1)
...the world's most energy friendly microcontrollers
R1
432
+
-
R2
VOUT3= VIN(1+ R2/R1)
OPA Configuration
OPA0INP
NEXTOUT
POSPAD2
OPATAP
OPA1INP
OPA Configuration
POSPAD0, DAC0
OPATAP
VSS, NEGPAD0
NEXTOUT
OPA0INP
OPATAP
VSS, NEGPAD1
NEXTOUT
OPA1INP
OPATAP
VSS, NEGPAD2
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