EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 219

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
16.3 Functional Description
16.3.1 Frame Format
2010-12-21 - d0034_Rev0.90
• Can use a high frequency clock source for even higher baud rates
• Configurable number of data bits: 8 or 9 (plus parity bit, if enabled)
• Configurable parity: off, even or odd
• Configurable number of stop bits, 1 or 2
• Capable of sleep-mode wakeup on received frame
• Supports transmission and reception in EM0, EM1 and EM2 with
• IrDA modulator (pulse generator, pulse extender)
• Multi-processor mode
• Loopback mode
• PRS RX input
An overview of the LEUART module is shown in Figure 16.1 (p. 219) .
Figure 16.1. LEUART Overview
The frame format used by the LEUART consists of a set of data bits in addition to bits for synchronization
and optionally a parity bit for error checking. A frame starts with one start-bit (S), where the line is driven
• Supports baud rates from 300 baud/s to 9600 baud/s
• HW parity bit generation and check
• Either wake-up on any received byte or
• Wake up only on specified start and signal frames
• Full DMA support
• Specified start-byte can start reception automatically
• Half duplex communication
• Communication debugging
PRS Input
LEUn_RX
LEUn_TX
Pulse
gen
TX Shift Register
TX Baud rate
TX Buffer
generator
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219
(STARTFRAME)
Peripheral Bus
UART Control
(SIGFRAME)
Signal fram e
RX Wakeup
Start fram e
and status
SYNC
=
=
extend
Pulse
www.energymicro.com
RX Shift Register
RX Baud rate
RX Buffer
generator
Start fram e interrupt
Signal fram e interrupt
! RXBLOCK

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