EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 372

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
22.5.6 ACMPn_IFS - Interrupt Flag Set Register
22.5.7 ACMPn_IFC - Interrupt Flag Clear Register
31:2
1
0
31:2
1
0
31:2
1
0
Bit
Offset
0x014
Reset
Access
Name
Bit
Offset
0x018
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
Reserved
WARMUP
Indicates that the analog comparator warm-up period is finished.
EDGE
Indicates that there has been a rising or falling edge on the analog comparator output.
Reserved
WARMUP
Write to 1 to set warm-up finished interrupt flag.
EDGE
Write to 1 to set edge triggered interrupt flag.
Reserved
WARMUP
Write to 1 to clear warm-up finished interrupt flag.
EDGE
Write to 1 to clear edge triggered interrupt flag.
Name
Name
Name
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
R
R
W1
W1
W1
W1
Access
Access
Access
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372
Bit Position
Bit Position
Warm-up Interrupt Flag
Edge Triggered Interrupt Flag
Warm-up Interrupt Flag Set
Edge Triggered Interrupt Flag Set
Warm-up Interrupt Flag Clear
Edge Triggered Interrupt Flag Clear
Description
Description
Description
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