EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 359

• Manufacturer Part Number: EFM32TG210F32
• Description: MCU 32BIT 32KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Tiny Geckor

Specifications of EFM32TG210F32

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Processor To Be Evaluated: EFM32TG210
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

21.5.25 LESENSE_STx_TCONFB - State transition configuration B (Async
Reg)
11:8
7:4
3:0
31:17
16
15
14:12
Bit
Offset
0x204
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
For more information about Asynchronous Registers please see Section 5.3 (p. 18) .
NEXTSTATE
Index of next state to be entered if the sensor state equals COMP
MASK
Set bit X to exclude sensor X from evaluation.
COMP
State transition is triggered when sensor state equals COMP
Reserved
SETIF
Set interrupt flag when sensor state equals COMP
Reserved
PRSACT
Configure which action to perform when sensor state equals COMP
Name
Name
PRSCNT = 0
NONE
UP
DOWN
PRS2
UPANDPRS2
DOWNANDPRS2
PRSCNT = 0
Mode
NONE
PRS0
PRS1
PRS01
PRS2
PRS02
PRS12
PRS012
PRSCNT = 1
NONE
UP
DOWN
PRS2
0xX
0xX
0xX
X
0xX
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0
1
2
4
5
6
Value
0
1
2
3
4
5
6
7
0
1
2
4
RW
RW
RW
RW
RW
Access
Access
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359
Bit Position
Next state index
Sensor mask
Sensor compare value
Set interrupt flag
Configure transition action
Description
Description
Do not count
Count up
Count down
Generate pulse on LESPRS2
Count up and generate pulse on LESPRS2.
Count down and generate pulse on LESPRS2.
Description
No PRS pulses generated
Generate pulse on PRS0
Generate pulse on PRS1
Generate pulse on PRS0 and PRS1
Generate pulse on PRS2
Generate pulse on PRS0 and PRS2
Generate pulse on PRS1 and PRS2
Generate pulse on PRS0, PRS1 and PRS2
Do not count
Count up
Count down
Generate pulse on PRS2
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