ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 45

MCU ATMEGA644/AT86RF230 40-DIP

ATMEGA64RZAV-10PU

Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10PU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
9. System Control and Reset
9.1
9.2
2593N–AVR–07/10
Resetting the AVR
Reset Sources
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be a JMP – Absolute
Jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. This is also the case if the Reset Vector is in the Application section while the Interrupt
Vectors are in the Boot section or vice versa. The circuit diagram in
logic.
reset circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
The ATmega644 has five sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer than
• Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the
• Brown-out Reset. The MCU is reset when the supply voltage V
• JTAG AVR Reset. The MCU is reset as long as there is a logic one in the Reset Register, one
threshold (V
the minimum pulse length.
Watchdog is enabled.
threshold (V
of the scan chains of the JTAG system. Refer to the section
scan” on page 259
”System and Reset Characteristics” on page 320
POT
BOT
).
) and the Brown-out Detector is enabled.
for details.
”Clock Sources” on page
defines the electrical parameters of the
”IEEE 1149.1 (JTAG) Boundary-
CC
is below the Brown-out Reset
Figure 9-1
ATmega644
28.
shows the reset
45

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