ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 17

MCU ATMEGA644/AT86RF230 40-DIP

ATMEGA64RZAV-10PU

Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10PU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
6. AVR Memories
6.1
2593N–AVR–07/10
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega644. The AVR architecture has two
main memory spaces, the Data Memory and the Program Memory space. In addition, the
ATmega644 features an EEPROM Memory for data storage. All three memory spaces are linear
and regular.
The ATmega644 contains 64 Kbytes On-chip In-System Reprogrammable Flash memory for
program storage. Since all AVR instructions are 16 bitsor 32 bits wide, the Flash is organized as
32/64 × 16. For software security, the Flash Program memory space is divided into two sections,
Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega644
Program Counter (PC) is 15/16 bits wide, thus addressing the 32/64K program memory loca-
tions. The operation of Boot Program section and associated Boot Lock bits for software
protection are described in detail in
ming” on page 284
SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description.
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 6-1.
14.
Program Memory Map
contains a detailed description on Flash data serial downloading using the
Application Flash Section
”Memory Programming” on page
Boot Flash Section
”Instruction Execution Tim-
284.
ATmega644
”Memory Program-
17

Related parts for ATMEGA64RZAV-10PU