ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 150

• Manufacturer Part Number: ATMEGA64RZAV-10PU
• Description: MCU ATMEGA644/AT86RF230 40-DIP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA64RZAV-10PU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 2kB EEPROM, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 40-DIP (0.600", 15.24mm)
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Applications: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega64

15.11.3
15.11.4
15.11.5
15.11.6
150
ATmega644
TCNT2 – Timer/Counter Register
OCR2A – Output Compare Register A
OCR2B – Output Compare Register B
ASSR – Asynchronous Status Register
Table 15-9.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a Compare Match between TCNT2 and the OCR2x Registers.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2A pin.
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2B pin.
Bit
(0xB2)
Read/Write
Initial Value
Bit
(0xB3)
Read/Write
Initial Value
Bit
(0xB4)
Read/Write
Initial Value
Bit
(0xB6)
Read/Write
Initial Value
CS22
0
1
1
1
1
R
7
–
0
Clock Select Bit Description
R/W
R/W
R/W
7
0
7
0
7
0
CS21
EXCLK
1
0
0
1
1
R/W
6
0
R/W
R/W
R/W
6
0
6
0
6
0
AS2
R/W
5
0
CS20
R/W
R/W
R/W
1
0
1
0
1
TCN2UB
5
0
5
0
5
0
R
4
0
R/W
R/W
R/W
Description
clk
clk
clk
clk
clk
4
0
4
0
4
0
OCR2A[7:0]
OCR2B[7:0]
OCR2AUB
TCNT2[7:0]
T2S
T2S
T2S
T
T
2
2
S
S
R
3
0
/256 (From prescaler)
/1024 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
R/W
R/W
R/W
3
0
3
0
3
0
OCR2BUB
R
2
0
R/W
R/W
R/W
2
0
2
0
2
0
TCR2AUB
R/W
R/W
R/W
R
1
0
1
0
1
0
1
0
TCR2BUB
R/W
R/W
R/W
0
0
0
0
0
0
0
R
0
2593N–AVR–07/10
OCR2A
OCR2B
TCNT2
ASSR