ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 298

• Manufacturer Part Number: ATMEGA64RZAV-10PU
• Description: MCU ATMEGA644/AT86RF230 40-DIP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA64RZAV-10PU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 2kB EEPROM, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 40-DIP (0.600", 15.24mm)
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Applications: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega64

298
ATmega644
Figure 25-9. Parallel Programming Timing, Reading Sequence (within the Same Page) with
Note:
Table 25-14. Parallel Programming Characteristics, V
Symbol
V
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PP
DVXH
XLXH
XHXL
XLDX
XLWL
XLPH
PLXH
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
PP
XTAL1
DATA
BS1
XA0
XA1
OE
1. The timing requirements shown in
reading operation.
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before XTAL1 High
XTAL1 Low to XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
XTAL1 Low to PAGEL high
PAGEL low to XTAL1 high
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS2/1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
Timing Requirements
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
t
XLOL
t
OLDV
(1)
(1)
(LOW BYTE)
DATA (Low Byte)
READ DATA
Figure 25-7
t
BVDV
(2)
(that is, t
CC
= 5V ±10%
(HIGH BYTE)
READ DATA
DATA (High Byte)
DVXH
11.5
Min
200
150
150
150
150
, t
3.7
7.5
67
67
67
67
67
67
67
0
0
0
XHXL
t
OHDZ
, and t
Typ
LOAD ADDRESS
XLDX
(LOW BYTE)
ADDR1 (Low Byte)
Max
12.5
250
4.5
) also apply to
1
9
2593N–AVR–07/10
Units
μA
ms
ns
μs
V