ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 280

MCU ATMEGA644/AT86RF230 40-DIP

ATMEGA64RZAV-10PU

Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10PU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
24.8.14
In
Table 24-7.
The different BOOTSZ Fuse configurations are shown in
Table 24-8.
Note:
280
BOOTSZ1
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Table 24-7
1
1
0
0
1. For details about these two section, see
ATmega644
ATmega644 Boot Loader Parameters
Write Section” on page
BOOTSZ0
through
Boot Size Configuration
Read-While-Write Limit
1
0
1
0
Table
1024 words
2048 words
4096 words
Boot Size
Note:
512 words
24-9, the parameters used in the description of the Self-Programming are given.
Do_spm:
Wait_spm:
Wait_ee:
ret
; re-enable the RWW section
ldi
call Do_spm
rjmp Return
; check for previous SPM complete
in
sbrc temp1, SPMEN
rjmp Wait_spm
; input: spmcrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
sbic EECR, EEPE
rjmp Wait_ee
; SPM timed sequence
out
spm
; restore SREG (to enable interrupts if originally enabled)
out
ret
270.
1. For details about these two section, see
270
(1)
spmcrval, (1<<RWWSRE) | (1<<SPMEN)
temp1, SPMCSR
temp2, SREG
SPMCSR, spmcrval
SREG, temp2
Pages
and
16
32
4
8
”RWW – Read-While-Write Section” on page
”NRWW – No Read-While-Write Section” on page 270
Application
Flash Section
0x0000 - 0x7DFF
0x0000 - 0x7BFF
0x0000 - 0x77FF
0x0000 - 0x6FFF
Pages
224
32
Figure
24-2.
Boot Loader
Flash Section
0x7E00 - 0x7FFF
0x7C00 - 0x7FFF
0x7800 - 0x7FFF
0x7000 - 0x7FFF
Address
0x0000 - 0x6FFF
0xF000 - 0x7FFF
”NRWW – No Read-While-Write Section” on page
270.
End Application
Section
0x7DFF
0x7BFF
0x77FF
0x6FFF
and
”RWW – Read-While-
Boot Reset
Address
(Start Boot
Loader
Section)
0x7E00
0x7C00
0x7800
0x7000
2593N–AVR–07/10

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