ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 322

• Manufacturer Part Number: ATMEGA64RZAV-10PU
• Description: MCU ATMEGA644/AT86RF230 40-DIP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA64RZAV-10PU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 2kB EEPROM, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 40-DIP (0.600", 15.24mm)
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Applications: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega64

26.7
322
4. fCK = CPU clock frequency
5. This requirement applies to all ATmega32 Two-wire Serial Interface operation. Other devices connected to the Two-wire
SPI Timing Characteristics
ATmega644
Serial Bus need only obey the general fSCL requirement.
Figure 26-4. 2-wire Serial Bus Timing
See
Table 26-6.
Note:
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
SCL
SDA
Figure 26-5
1. In SPI Programming mode the minimum SCK high/low period is:
t
SU;STA
- 2 t
- 3 t
SS high to tri-state
SCK to out high
SCK high/low
SCK to SS high
SS low to SCK
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
SPI Timing Parameters
Description
CLCL
CLCL
SCK period
SCK period
Out to SCK
SCK to out
SCK to out
and
Setup
Setup
Hold
Hold
for f
for f
Figure 26-6
CK
CK
< 12 MHz
> 12 MHz
(1)
t
HD;STA
t
t
of
LOW
for details.
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
t
HIGH
t
HD;DAT
t
LOW
4 • t
2 • t
Min
10
20
20
t
ck
ck
ck
t
SU;DAT
See
50% duty cycle
0.5 • t
Table 16-5
Typ
3.6
10
10
10
10
15
15
10
sck
t
SU;STO
t
r
Max
1600
2593N–AVR–07/10
t
BUF
ns