ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 215

MCU ATMEGA644/AT86RF230 40-DIP

ATMEGA64RZAV-10PU

Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10PU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
2593N–AVR–07/10
Figure 19-13. Data Transfer in Master Receiver Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be written to one to enable the 2-wire Serial Interface, TWSTA must be written to
one to transmit a START condition and TWINT must be set to clear the TWINT Flag. The TWI
will then test the 2-wire Serial Bus and generate a START condition as soon as the bus
becomes free. After a START condition has been transmitted, the TWINT Flag is set by hard-
ware, and the status code in TWSR will be 0x08 (See
SLA+R must be transmitted. This is done by writing SLA+R to TWDR. Thereafter the TWINT bit
should be cleared (by writing it to one) to continue the transfer. This is accomplished by writing
the following value to TWCR:
When SLA+R have been transmitted and an acknowledgement bit has been received, TWINT is
set again and a number of status codes in TWSR are possible. Possible status codes in Master
mode are 0x38, 0x40, or 0x48. The appropriate action to be taken for each of these status codes
is detailed in
Flag is set high by hardware. This scheme is repeated until the last byte has been received.
After the last byte has been received, the MR should inform the ST by sending a NACK after the
last received data byte. The transfer is ended by generating a STOP condition or a repeated
START condition. A STOP condition is generated by writing the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
After a repeated START condition (state 0x10) the 2-wire Serial Interface can access the same
Slave again, or a new Slave without transmitting a STOP condition. Repeated START enables
TWCR
value
TWCR
value
TWCR
value
TWCR
value
SDA
SCL
Table
TWINT
TWINT
TWINT
TWINT
1
1
1
1
19-3. Received data can be read from the TWDR Register when the TWINT
Device 1
RECEIVER
MASTER
TWEA
TWEA
TWEA
TWEA
X
X
X
X
TRANSMITTER
Device 2
SLAVE
TWSTA
TWSTA
TWSTA
TWSTA
0
1
0
1
Device 3
TWSTO
TWSTO
TWSTO
TWSTO
0
0
1
0
........
Table
TWWC
TWWC
TWWC
TWWC
Device n
X
X
X
X
19-2). In order to enter MR mode,
V
CC
TWEN
TWEN
TWEN
TWEN
1
1
1
1
R1
ATmega644
R2
0
0
0
0
TWIE
TWIE
TWIE
TWIE
X
X
X
X
215

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