ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 146
ATMEGA64RZAV-10PU
Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA644-20MU.pdf
(23 pages)
2.ATMEGA644-20MU.pdf
(376 pages)
3.AT86RF230-ZU.pdf
(98 pages)
Specifications of ATMEGA64RZAV-10PU
Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
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- Download datasheet (8Mb)
15.11 Register Description
15.11.1
146
ATmega644
TCCR2A – Timer/Counter Control Register A
• Bits 7:6 – COM2A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2A pin
must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 15-2.
Table 15-3
mode.
Table 15-3.
Note:
Bit
(0xB0)
Read/Write
Initial Value
COM2A1
COM2A1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 138
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
COM2A1
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
R/W
7
0
COM2A0
COM2A0
for more details.
0
1
0
1
0
1
0
1
Table 15-2
COM2A0
R/W
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC2A on Compare Match
Clear OC2A on Compare Match
Set OC2A on Compare Match
Description
Normal port operation, OC2A disconnected.
WGM22 = 0: Normal Port Operation, OC0A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.
Clear OC2A on Compare Match, set OC2A at BOTTOM
(non-inverting mode)
Set OC2A on Compare Match, clear OC2A at BOTTOM
(inverting mode)
COM2B1
shows the COM2A1:0 bit functionality when the WGM22:0 bits
R/W
5
0
COM2B0
R/W
4
0
R
3
–
0
(1)
R
2
0
–
WGM21
R/W
1
0
”Fast PWM Mode” on
WGM20
R/W
0
0
2593N–AVR–07/10
TCCR2A
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