ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 234

MCU ATMEGA644/AT86RF230 40-DIP

ATMEGA64RZAV-10PU

Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10PU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
Figure 21-1. Analog-to-digital Converter Block Schematic
21.3
234
BANDGAP (1.1V)
ADC[7:0]
REFERENCE
REFERENCE
(1.1V/2.56V)
INTERNAL
AVCC
Operation
AREF
GND
8-BIT DATABUS
ATmega644
ADC[2:0]
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
the AREF pin minus 1 LSB. Optionally, AVCC or an internal 2.56V reference voltage may be
connected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The internal
voltage reference may thus be decoupled by an external capacitor at the AREF pin to improve
noise immunity.
The analog input channel and differential gain are selected by writing to the MUX bits in
ADMUX. Any of the ADC input pins, as well as GND and a fixed bandgap voltage reference, can
be selected as single ended inputs to the ADC. A selection of ADC input pins can be selected as
positive and negative inputs to the differential gain amplifier.
ADC MULTIPLEXER
SELECT (ADMUX)
INPUT
INPUT
NEG
MUX
POS
MUX
MUX DECODER
+
-
REGISTER B (ADCSRB)
ADC CTRL & STATUS
AMPLIFIER
GAIN
10-bit DAC
REGISTER A (ADCSRA)
ADC CTRL & STATUS
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
-
+
ADTS[2:0]
START
TRIGGER
SELECT
SAMPLE & HOLD
INTERRUPT
COMPARATOR
ADC
MULTIPLEXER
OUTPUT
FLAGS
15
ADC DATA REGISTER
(ADCH/ADCL)
2593N–AVR–07/10
0

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