ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 321

MCU ATMEGA644/AT86RF230 40-DIP

ATMEGA64RZAV-10PU

Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10PU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
26.6
Table 26-5
face meets or exceeds these requirements under the noted conditions.
Timing symbols refer to
Table 26-5.
Notes:
2593N–AVR–07/10
Symbol
V
V
V
V
t
t
t
I
C
f
Rp
t
t
t
t
t
t
t
t
r
of
SP
i
SCL
HD;STA
LOW
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
(1)
IL
IH
hys
OL
i
(1)
(1)
(1)
(1)
(1)
2-wire Serial Interface Characteristics
1. In ATmega644, this parameter is characterized and not 100% tested.
2. Required only for fSCL > 100 kHz.
3. Cb = capacitance of one bus line in pF.
describes the requirements for devices connected to the 2-wire Serial Bus. The ATmega644 2-wire Serial Inter-
Parameter
Input Low-voltage
Input High-voltage
Hysteresis of Schmitt Trigger Inputs
Output Low-voltage
Rise Time for both SDA and SCL
Output Fall Time from V
Spikes Suppressed by Input Filter
Input Current each I/O Pin
Capacitance for each I/O Pin
SCL Clock Frequency
Value of Pull-up resistor
Hold Time (repeated) START Condition
Low Period of the SCL Clock
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
2-wire Serial Bus Requirements
Figure
26-4.
IHmin
to V
ILmax
f
CK
(4)
10 pF < C
0.1V
> max(16f
3 mA sink current
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
CC
Condition
< V
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
b
< 400 pF
SCL
i
< 0.9V
, 250kHz)
CC
(3)
(5)
20 + 0.1C
20 + 0.1C
V
----------------------------- -
V
----------------------------- -
0.05V
CC
CC
0.7V
3 mA
3 mA
-0.5
250
100
Min
-10
4.0
0.6
4.7
1.3
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0
0
0
0
0
0.4 V
0.4 V
CC
CC
b
b
(2)
(2)(3)
(2)(3)
ATmega644
V
1000n s
-------------------- -
0.3V
CC
300 ns
----------------- -
50
3.45
Max
300
250
400
0.4
0.9
C
10
10
C
+ 0.5
b
(2)
b
CC
Units
kHz
µA
pF
ns
µs
ns
µs
Ω
V
321

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