ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 35

MCU ATMEGA644/AT86RF230 40-DIP

ATMEGA64RZAV-10PU

Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10PU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
7.8
2593N–AVR–07/10
External Clock
To drive the device from an external clock source, XTAL1 should be driven as shown in
7-3. To run the device on an external clock, the CKSEL Fuses must be programmed to “0000”.
Figure 7-3.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 7-12.
Table 7-13.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. If changes of more than 2% is
required, ensure that the MCU is kept in Reset during the changes.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
36
BOD enabled
Fast rising power
Slowly rising power
for details.
Power Conditions
7-13.
External Clock Drive Configuration
Crystal Oscillator Clock Frequency
Start-up Times for the External Clock Selection
Nominal Frequency
0 - 20 MHz
EXTERNAL
SIGNAL
CLOCK
Start-up Time from Power-
down and Power-save
NC
Reserved
6 CK
6 CK
6 CK
XTAL2
XTAL1
GND
Additional Delay from
”System Clock Prescaler” on page
Reset (V
14CK + 4.1 ms
14CK + 65 ms
14CK
CC
ATmega644
CKSEL3..0
= 5.0V)
0000
SUT1..0
00
01
10
11
Figure
35

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