SAK-TC1796-256F150E BD Infineon Technologies, SAK-TC1796-256F150E BD Datasheet - Page 77

• Manufacturer Part Number: SAK-TC1796-256F150E BD
• Description: IC MCU 32BIT FLASH PG-BGA-416
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Packages: PG-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: KT1796256F150EBDXP; SAK-TC1796-256F150EBDIN; SP000228336

Figure 19
Recommended Oscillator Circuits
The oscillator circuit, a Pierce oscillator, is designed to work with both, an external crystal
oscillator or an external stable clock source. It basically consists of an inverting amplifier
and a feedback element with XTAL1 as input, and XTAL2 as output.
When using a crystal, a proper external oscillator circuitry must be connected to both
pins, XTAL1 and XTAL2. The crystal frequency can be within the range of 4 MHz
to 25 MHz. Additionally are necessary, two load capacitances
depending on the crystal type a series resistor
may be temporarily inserted to measure the oscillation allowance (negative resistance)
of the oscillator circuitry.
and
resistance evaluation and for non-productive systems. The exact values and related
operating range are dependent on the crystal frequency and have to be determined and
Data Sheet
are derived from
be equal to
XTAL2
P5.3 /
TXD1A
XTAL1
BYPASS
C
X2
values shown in
Circuit
Oscillator Control Register
Main
Osc.
Clock Generation Unit
f
CPU
OSC_CON
or
f
Detect.
VCO
Osc.
Run
f
CPU
f
OSC
R
only by the K-Divider. In this mode, the system clock
Divider
Q
/2.
Figure 20
P-
values are typically specified by the crystal vendor. The
System Control Unit (SCU)
Clock Generation Unit (CGU)
Detect.
Lock
PLL
1
can be used as starting points for the negative
f
f
P
N
77
PLL
Detect.
Phase
PLL Clock Control and Status Register
R
X2
to limit the current. A test resistor
Divider
VCO
N-
PLL_CLC
f
VCO
Functional Description
M
U
X
C
X1
Control
Divider
Output
Clock
and
MCB05600
K-
V1.0, 2008-04
C
TC1796
f
X2
SYS
f
f
CPU
SYS
, and
can
C
R
X1
Q