SAK-TC1796-256F150E BD Infineon Technologies, SAK-TC1796-256F150E BD Datasheet - Page 54

• Manufacturer Part Number: SAK-TC1796-256F150E BD
• Description: IC MCU 32BIT FLASH PG-BGA-416
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Packages: PG-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: KT1796256F150EBDXP; SAK-TC1796-256F150EBDIN; SP000228336

3.12
Figure 11
interfaces.
Figure 11
The MultiCAN module contains four independently operating CAN nodes with Full-CAN
functionality that are able to exchange Data and Remote Frames via a gateway function.
Transmission and reception of CAN frames is handled in accordance with CAN
specification V2.0 B (active). Each CAN node can receive and transmit standard frames
with 11-bit identifiers as well as extended frames with 29-bit identifiers.
All four CAN nodes share a common set of message objects. Each message object can
be individually allocated to one of the CAN nodes. Besides serving as a storage
container for incoming and outgoing frames, message objects can be combined to build
gateways between the CAN nodes or to setup a FIFO buffer.
The message objects are organized in double-chained linked lists, where each CAN
node has it’s own list of message objects. A CAN node stores frames only into message
Data Sheet
Decoder
Ext.Req.
Address
Interrupt
GPTA1
GPTA0
Control
Control
LTCA2
Clock
DMA
SCU
Unit
shows a global view of the MultiCAN module with its functional blocks and
MultiCAN Controller (CAN)
ECTT4
ECTT5
ECTT3
f
f
CAN
INT_O
INT_O
INT_
O15
Block Diagram of MultiCAN Module with Time-Triggered Extension
CLC
[15:4]
[3:0]
Message
Timing Control and Synchronization
Objects
Object
Buffer
Time-Triggered Extension TTCAN
128
ScheduleTiming DataMemory
CAN Control
MultiCAN Module Kernel
Scheduler
Control
Linked
List
54
Node 3
Node 2
Node 1
Node 0
CAN
CAN
CAN
CAN
TXDC3
RXDC3
TXDC2
RXDC2
TXDC1
RXDC1
TXDC0
RXDC0
ECTT2
ECTT1
Control
Port 6
Functional Description
A2
A2
A2
A2
A2
A2
A2
A2
A1
A1
V1.0, 2008-04
P6.15 /
TXDCAN3
P6.14 /
RXDCAN3
P6.13 /
TXDCAN2
P6.12 /
RXDCAN2
P6.11 /
TXDCAN1
P6.10 /
RXDCAN1
P6.9 /
TXDCAN0
P6.8 /
RXDCAN0
P1.3 /
REQ3
P7.5 /
REQ7
MCA05864
TC1796