SAK-TC1796-256F150E BD Infineon Technologies, SAK-TC1796-256F150E BD Datasheet - Page 18

• Manufacturer Part Number: SAK-TC1796-256F150E BD
• Description: IC MCU 32BIT FLASH PG-BGA-416
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Packages: PG-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: KT1796256F150EBDXP; SAK-TC1796-256F150EBDIN; SP000228336

Table 2
Symbol
P1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P1.8
P1.9
P1.10
P1.11
P1.12
P1.13
P1.14
P1.15
Data Sheet
Pins
P3
P2
P1
N1
N4
M4
N3
N2
M3
M2
M1
L4
P4
L3
L2
L1
Pin Definitions and Functions (cont’d)
I/O Pad
I/O A1/A2
I
I
I
I
I
O
I
O
O
I
O
I
I
O
I
I
I
Class
A1
A1
A1
A1
A1
A2
A1
A2
A2
A1
A2
A1
A1
A2
A1
A1
A1
Power
Supply
V
DDP
18
Functions
Port 1
Port 1 is a 16-bit bi-directional general-
purpose I/O port which can be alternatively
used for the MLI0 interface or as external
trigger input lines.
REQ0
REQ1
REQ2
REQ3
TREADY0B
TCLK0
TREADY0A
TVALID0A
TDATA0
RCLK0A
RREADY0A
RVALID0A
RDATA0A
SYSCLK
RCLK0B
RVALID0B
RDATA0B
General Device Information
External trigger input 0
External trigger input 1
External trigger input 3
External trigger input 2
MLI0 transmit channel
ready input B
MLI0 transmit channel clock
output
MLI0 transmit channel
ready input A
MLI0 transmit channel valid
output A
MLI0 transmit channel data
output
MLI0 receive channel clock
input A
MLI0 receive channel ready
output A
MLI0 receive channel valid
input A
MLI0 receive channel data
input A
System clock output
MLI0 receive channel clock
input B
MLI0 receive channel valid
input B
MLI0 receive channel data
input B
V1.0, 2008-04
TC1796