SAK-TC1796-256F150E BD Infineon Technologies, SAK-TC1796-256F150E BD Datasheet - Page 50

• Manufacturer Part Number: SAK-TC1796-256F150E BD
• Description: IC MCU 32BIT FLASH PG-BGA-416
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Packages: PG-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: KT1796256F150EBDXP; SAK-TC1796-256F150EBDIN; SP000228336

3.10
Figure 9
Speed Synchronous Serial interfaces SSC0 and SSC1.
Figure 9
The SSC allows full-duplex and half-duplex serial synchronous communication up to
37.5 Mbit/s (@ 75 MHz module clock) with Receive and Transmit FIFO support. (FIFO
only in SSC0). The serial clock signal can be generated by the SSC itself (Master Mode)
Data Sheet
To
DMA
To
DMA
1) These lines are not connected
Decoder
Decoder
Address
Interrupt
Address
Interrupt
Control
Control
Control
Control
SSC0_RDR
SSC0_TDR
SSC1_RDR
SSC1_TDR
Clock
Clock
shows a global view of the functional blocks and interfaces of the two High-
High-Speed Synchronous Serial Interfaces (SSC0, SSC1)
Block Diagram of the SSC Interfaces
f
EIR
TIR
RIR
f
EIR
TIR
RIR
f
f
SSC0
SSC1
CLC0
CLC1
8-Stage RXFIFO
8-Stage TXFIFO
(Kernel)
(Kernel)
Module
Module
SSC0
SSC1
Master
Master
Master
Master
Master
Master
Slave
Slave
Slave
Slave
Slave
Slave
50
M/S Selected
SSC Enabled
SLSO[7:2]
SLSI1
SLSI1
SLSI[7:2]
SLSI[7:2]
MRSTA
MRSTB
MTSR
MTSRA
MTSRB
MRST
SCLKA
SCLKB
SCLK
MRSTA
MRSTB
MTSR
MTSRA
MTSRB
MRST
SCLKA
SCLKB
SCLK
SLSO[7:2]
1)
1)
Control
Control
Port 2
Port 6
Functional Description
SLSO0
SLSO1
V1.0, 2008-04
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
TC1796
MCA05791
MRST0
MTSR0
SCLK0
SLSI0
SLSO0
SLSO1
P2.2 /
SLSO2
P2.7 /
SLSO7
P6.4 /
MTSR1
P6.5 /
MRST1
P6.6 /
SCLK1
P6.7 /
SLSI1