SAK-TC1796-256F150E BD Infineon Technologies, SAK-TC1796-256F150E BD Datasheet - Page 128

IC MCU 32BIT FLASH PG-BGA-416

SAK-TC1796-256F150E BD

Manufacturer Part Number
SAK-TC1796-256F150E BD
Description
IC MCU 32BIT FLASH PG-BGA-416
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1796-256F150E BD

Core Processor
TriCore
Core Size
32-Bit
Speed
150MHz
Connectivity
ASC, CAN, EBI/EMI, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
123
Program Memory Size
2MB (2M x 8)
Program Memory Type
FLASH
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 44x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
416-BGA
Packages
PG-BGA-416
Max Clock Frequency
150.0 MHz
Sram (incl. Cache)
256.0 KByte
Can Nodes
4
A / D Input Lines (incl. Fadc)
44
Program Memory
2.0 MB
For Use With
B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KT1796256F150EBDXP
SAK-TC1796-256F150EBDIN
SP000228336
4.3.12.2 Micro Second Channel (MSC) Interface Timing
Table 33
Parameter
FCLP clock period
SOP/ENx outputs delay
from FCLP rising edge
SDI bit time
SDI rise time
SDI fall time
1) FCLP signal rise/fall times are the same as the A2 Pads rise/fall times.
2) FCLP signal high and low can be minimum 1 ×
3)
Figure 43
Note: The data at SOP should be sampled with the falling edge of FCLP in the target
Data Sheet
T
MSCmin
device.
FCLP
SOP
EN
SDI
=
T
SYS
MSC Interface Timing (Operating Conditions apply), C
MSC Interface Timing
= 1/
f
SYS
1)2)
. When
t
45
f
SYS
= 75 MHz,
Symbol
t
t
t
t
t
40
45
46
48
49
t
46
CC 2 ×
CC -10
CC 8 ×
SR
SR
t
40
t
40
T
Min.
MSC
= 26,67ns
128
.
T
T
t
48
MSC
MSC
3)
t
Values
45
t
Typ.
46
Max.
10
100
100
t
Electrical Parameters
49
MSC_Tmg_1.vsd
Unit
ns
ns
ns
ns
ns
L
0.9
0.1
= 50 pF
0.9
0.1
V
V
V
V
V1.0, 2008-04
DDP
DDP
DDP
DDP
Note /
Test Con
dition
TC1796

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