SAK-TC1796-256F150E BD Infineon Technologies, SAK-TC1796-256F150E BD Datasheet - Page 41

• Manufacturer Part Number: SAK-TC1796-256F150E BD
• Description: IC MCU 32BIT FLASH PG-BGA-416
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Packages: PG-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: KT1796256F150EBDXP; SAK-TC1796-256F150EBDIN; SP000228336

3.5
The External Bus Unit (EBU) of the TC1796 is the units that controls the transactions
between external memories or peripheral units with the internal memories and peripheral
units. The EBU is a part of the PMU and communicates with CPU and PMI via the
Program Local Memory Bus. This configuration allows to get fast access times especially
when using external burst FLASH memory devices.
Figure 4
The following features are supported by the EBU:
•
•
•
Data Sheet
64-bit internal Program Local Memory Bus (PLMB) interface
32-bit external demultiplexed bus interface
– Asynchronous read/write accesses support Intel-style and Motorola-style interface
– Synchronous burst FLASH memory read
– Five programmable regions associated each to one chip select output
– Flexibly programmable access parameters for each chip select region
– Little-endian and Big-endian support
– Programmable wait state control
Scalable external bus frequency
– Derived from PLMB frequency (
– Max. 75 MHz
signals
Data
Bus
Control
Lines
Arbitration
Signals
Address
Bus
External Bus Unit
EBU Block Diagram
32
24
State Machine
Asynchronous
State Machine
Address Path
Burst Access
External Bus
Arbitration
Data Path
Control
Access
Control
f
CPU
) divided by 1, 2, 3, or 4
41
Selection
External Bus Unit EBU
Region
PLMB
Data
PLMB
Address
64
32
Functional Description
64
Program
Local
Memory
Bus
MCB05713
V1.0, 2008-04
TC1796