SAK-TC1796-256F150E BD Infineon Technologies, SAK-TC1796-256F150E BD Datasheet - Page 73

IC MCU 32BIT FLASH PG-BGA-416

SAK-TC1796-256F150E BD

Manufacturer Part Number
SAK-TC1796-256F150E BD
Description
IC MCU 32BIT FLASH PG-BGA-416
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1796-256F150E BD

Core Processor
TriCore
Core Size
32-Bit
Speed
150MHz
Connectivity
ASC, CAN, EBI/EMI, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
123
Program Memory Size
2MB (2M x 8)
Program Memory Type
FLASH
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 44x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
416-BGA
Packages
PG-BGA-416
Max Clock Frequency
150.0 MHz
Sram (incl. Cache)
256.0 KByte
Can Nodes
4
A / D Input Lines (incl. Fadc)
44
Program Memory
2.0 MB
For Use With
B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KT1796256F150EBDXP
SAK-TC1796-256F150EBDIN
SP000228336
3.21
The TC1796 power management system allows software to configure the various
processing units so that they automatically adjust to draw the minimum necessary power
for the application. There are three power management modes:
The operation of each system component in each of these states can be configured by
software. The power-management modes provide flexible reduction of power
consumption through a combination of techniques, including stopping the CPU clock,
stopping the clocks of other system components individually, and individually clock-
speed reduction of some peripheral components.
Besides these explicit software-controlled power-saving modes, in the TC1796 special
attention has been paid for automatic power-saving in those operating units which are
currently not required or idle. In that case they are shut off automatically until their
operation is required again.
Table 8
Table 8
Mode
Run
Idle
Sleep
In typical operation, Idle Mode and Sleep Mode may be entered and exited frequently
during the run time of an application. For example, system software will typically cause
the CPU to enter Idle Mode each time it has to wait for an interrupt before continuing its
tasks. In Sleep Mode and Idle Mode, wake-up is performed automatically when any
enabled interrupt signal is detected, or if the Watchdog Timer signals the CPU with an
NMI trap.
Data Sheet
Run Mode
Idle Mode
Sleep Mode
describes the features of the power management modes.
Power Management System
Power Management Mode Summary
Description
The system is fully operational. All clocks and peripherals are enabled,
as determined by software.
The CPU clock is disabled, waiting for a condition to return it to Run
Mode. Idle Mode can be entered by software when the processor has no
active tasks to perform. All peripherals remain powered and clocked.
Processor memory is accessible to peripherals. A reset, Watchdog Timer
event, a falling edge on the NMI pin, or any enabled interrupt event will
return the system to Run Mode.
The system clock signal is distributed only to those peripherals
programmed to operate in Sleep Mode. The other peripheral module will
be shut down by the suspend signal. Interrupts from operating
peripherals, the Watchdog Timer, a falling edge on the NMI pin, or a reset
event will return the system to Run Mode. Entering this state requires an
orderly shut-down controlled by the Power Management State Machine.
73
Functional Description
V1.0, 2008-04
TC1796

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